Alif Semiconductor /AE302F80C1557LE_CM55_HP_View /I2C0 /I2C_DMA_TDLR

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Interpret as I2C_DMA_TDLR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DMATDL

Description

DMA Transmit Data Level Register

Fields

DMATDL

Transmit Data Level. This field controls the level at which a DMA request is made by the transmit logic. It is equal to the watermark level; that is, the I2C_DMA_TX signal is generated when the number of valid data entries in the Tx FIFO is equal to or below this field value, and I2C_DMA_CR[TDMAE] is set to 0x1.

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